Shinano: A Heterogeneous Application-Specific TLB Architecture for Streaming Accelerators

Abstract

The hardware fleet in modern datacenters is increasingly characterized by heterogeneity and specialized accelerators, including Field-Programmable Gate Arrays (FPGAs). The latter are especially suitable for streaming applications and the increasing availability of systems and shells providing higher level abstractions has made them easier to program and manage. However, as previous experience with GPUs shows, the memory model is critical in terms of usability and efficiency. In this paper, we present Shinano, an application-specific design for Translation Lookaside Buffers (TLBs) in streaming accelerators. By utilizing the spatial locality of memory accesses in streaming workloads and offering dynamic reconfiguration of page sizes in the TLB, we are able to fully leverage data-flow compute capabilities in reconfigurable accelerators. We have integrated the new memory model and its implementation into the Coyote v2 shell and demonstrated a four times better memory coverage with comparable hardware resource requirements as a conventional TLB for tasks like data encryption, machine learning inference, and image processing.

Reference

Luhao Liu, Maximilian Jakob Heer, Takahiro Shinagawa, Gustavo Alonso. Shinano: A Heterogeneous Application-Specific TLB Architecture for Streaming Accelerators. In Proceedings of the 3rd Workshop on Disruptive Memory Systems, Aug, 2025. .